1. Field
Exemplary embodiments of the present invention relate to integrated circuit design, and more particularly, to a post package repair for an Integrated circuit.
2. Description of the Related Art
FIG. 1 is a block diagram illustrating a conventional memory device performing a repair operation.
Referring to FIG. 1, the memory device includes a memory cell array 110, a row circuit 120, a column circuit 130, a row fuse circuit 140, and a row comparison unit 150.
The memory cell array 110 includes a plurality of memory cells, the row circuit 120 activates a row (or a word line) selected by a row address R_ADD, and the column circuit 130 accesses, for example, reads or writes, data of a column (or a bit line) selected by a column address C_ADD. The row fuse circuit 140 stores a row address corresponding to a defective memory cell within the memory cell array 110 as a repair row address REPAIR_R_ADD. A row comparison unit 150 compares the repair row address REPAIR_R_ADD stored in the row fuse circuit 140 to a row address R_ADD inputted from the outside of the memory device. When the repair row address REPAIR_R_ADD is identical with the row address R_ADD, the row comparison unit 150 controls the row circuit 120 to access a redundancy row (or a redundancy word line) instead of a row designated with the row address R_ADD. That is, the row (or the word line) corresponding to the repair row address REPAIR_R_ADD stored in the row fuse circuit 140 is substituted with a redundancy row (or a redundancy word line).
For reference, in the FIG. 1, “ACT” denotes an active command, “PRE” denotes a precharge command, “RD” denotes a read command, “WT” denotes a write command, and “DQs” denotes data or data pads.
Conventionally, laser fuses have been mainly used in the fuse circuit 140. The laser fuse stores a logic high data or a logic low data depending on whether the fuse is cut or not. The laser fuse may be programmed in a wafer state, but the fuse may not be programmed after a wafer is mounted in a package. Furthermore, the laser fuses may not be designed in a small area due to the limit in a line pitch.
In order to overcome such concerns, as disclosed in U.S. Pat. No. 6,904,751, U.S. Pat. No. 6,777,757, U.S. Pat. No. 6,667,902, U.S. Pat. No. 7,173,851, and U.S. Pat. No. 7,269,047, one of storage units, such as an e-fuse array circuit, a NAND flash memory, a NOR flash memory, a magnetoresistive random access memory (MRAM), a spin transfer torque magnetic random access memory (STT-MRAM), a resistive random access memory (ReRAM), and a phase change random access memory (PCRAM), is included into the memory device. Repair information, including, for example, fail addresses, is stored in the storage unit.
FIG. 2 is a block diagram illustrating a conventional memory device including storage unit for storing repair information.
Referring to FIG. 2, it may be seen that the fuse circuit 140 is removed from the memory device shown in FIG. 1 and a storage unit 210 and a register unit 220 are added.
The row fuse circuit 140 is substituted with the storage unit 210. Here, a row address corresponding to a defective memory cell in the memory cell array 110 is stored as a repair row address. The storage unit 210 may include an e-fuse array circuit, a NAND flash memory, a NOR flash memory, an MRAM, an STT-MRAM, a ReRAM, or a PCRAM.
The register unit 220 receives and stores repair information, for example, a fail address, programmed in the storage unit 210. The repair information stored in the register unit 220 is used for a repair operation. The register unit 220 may include latch circuits and may store the repair information only while power is supplied. An operation for transmitting the repair information from the storage unit 210 to the register unit 220 is referred to as a boot-up operation.
Since the storage unit 210 is configured in an array form, it takes some time to call internally stored data. Because calling for data may not be performed takes some time, it may not be possible to perform a repair operation immediately using the data stored in the storage unit 210. Accordingly, after the boot-up operation is performed to transmit the repair information stored in the storage unit 210 to the register unit 220 and to store the repair information, the repair operation is performed using the data stored in the register unit 220.
When the fuse circuit 140 including the laser fuses is substituted with the storage unit 210 and the register unit 220, it may be possible to repair an additional defect found in a package state. On the other hand, in recent years, technologies for accessing the storage unit 210 even after manufacturing of a memory device, for example, after selling of a product, and for repairing a defect occurring after the manufacturing of the memory device have been studied.